A good answer might be:

b  label     ==     beq  $0,$0,offset

Table of Branch Instructions

Here is a table of branch instructions. There are additional branch instructions used for subroutine linkage that have been omitted. Some instructions assume 32-bit two's complement data; others assume 32-bit unsigned data. Some instructions don't assume any data format.

The first operand s must be a register. The second operand t may be a register or a immediate operand (the extended assembler will generate the correct basic instructions depending on which you choose). The label designates address that can be reached with by adding a 16-bit, sign-extended integer to the PC. This means it must be roughly plus or minus 32K from the current instruction.

Mnemonic Operands Description signed or
unsigned?
blabelbranch  
beqs,t,labelbranch if s==t  
beqzs,labelbranch if s==0  
bges,t,labelbranch if s>=t signed
bgeus,t,labelbranch if s>=t unsigned
bgezs,labelbranch if s>=0 signed
bgts,t,labelbranch if s>t signed
bgtus,t,labelbranch if s>t unsigned
bgtzs,labelbranch if s>0 signed
bles,t,labelbranch if s<=t signed
bleus,t,labelbranch if s<=t unsigned
blezs,labelbranch if s<=0 signed
blts,t,labelbranch if s<t signed
bltus,t,labelbranch if s<t unsigned
bltzs,labelbranch if s<0 signed
bnes,t,labelbranch if s=/=t  
bnezs,labelbranch if s=/=0  

Some of the pseudoinstructions use the assembler temporary register ($at, or register $1) in the one or two basic instructions they are expanded to.

QUESTION 4:

What format of data is assumed for the bne (branch not equal) instruction?