QUESTION 4:
Every one of the 232 patterns that 32 bits can form is a legal two's complement integer.
Are some of there patterns not legal as a floating point value? Hint: think about the exponent and a zero mantissa.
Yes.
Actual hardware has a delay between a load instruction and the time when the data reaches the register. In SPIM there is an option that disables the load delay. For this chapter, set this option. (Floating point is tricky enough already).
Loading a single precision value is done with a pseudoinstruction:
l.s fd,addr # load register fd from addr
This instruction loads 32 bits of data from address addr
into floating point register $fd (where d is 0, 1, 2, ..., 15).
Whatever 32 bits are located at addr are copied into $fd.
If the data makes no sense as a floating point value, that is OK for this instruction.
Later on the mistake will be caught when floating point operations are attempted.
Every one of the 232 patterns that 32 bits can form is a legal two's complement integer.
Are some of there patterns not legal as a floating point value? Hint: think about the exponent and a zero mantissa.