QUESTION 7:
What is the bitwise OR of the following?
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(Trick Question:) What is the net result if a bit pattern is logical left shifted 2 positions then logical right shifted 2 positions?
The two bits on the left of the pattern are guaranteed to be zero; the other bits are not changed.
You might have hastily said that the net result is no change. But if there are one-bits at the left (high order) end of the pattern they will be lost.
| OR Operation on Bits | ||||
|---|---|---|---|---|
| first operand | 0 | 0 | 1 | 1 |
| second operand | 0 | 1 | 0 | 1 |
| __ | __ | __ | __ | |
| result | 0 | 1 | 1 | 1 |
MIPS has many instructions that use two registers as operands and puts the result in a register. All the action takes place inside the processor. The data comes from registers, the ALU performs the operation, and the result is written to a register. All this can be done quickly.
The assembly language must specify four things: (1) the operation, (2) the first operand register, (3) the second operand register, and (4) the destination register. Of course, the machine language must encode the same four things in bit patterns.
Here is the OR instruction:
or d,s,t # $d <-- bitwise OR between $s with $t.
Recall that the result of OR is zero only when both operand bits are zero.
What is the bitwise OR of the following?
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